• Home
  • /
  • Blog
  • /
  • Instruction Cycle In Computer Architecture (Explained In Simple Language)

Instruction Cycle In Computer Architecture (Explained In Simple Language)

Instruction Cycle

This post is also available in: हिन्दी (Hindi)

Computer architecture is the study of how computers process data. It is a vast and complex field, but can be broken down into three basic steps: input, processing, and output. In instruction cycle, the input stage is where the computer receives instructions from the user. The processing stage is where the computer executes those instructions. And finally, the output stage is where results are displayed to the user or stored on disk.

Much of what we know about computer architecture comes from studying how different processors (the brains of computers) work.

Program in Computer

The computer system needs a set of instructions that directs the computer to perform the desired operations. This set of instructions that a computer can interpret and execute is called a computer program.

The computer program is an essential component of every computer system. The choice of the programming language depends upon the type of software being developed.

The application software is written using a high-level programming language. Some of the commonly used programming languages include C, C++, Java, JavaScript, and Python.

YouTube player
Best Coding Languages for Kids

The computer program written in any high level programming language needs to be converted into machine-readable format in binary.

The machine code instructions in binary is a low-level set of program instructions that can be directly executed by the computer system.

Instruction Cycle
It’s a representative figure. Binary code is not an exact translation of code in C++

What is Program Instruction?

The computer program consists of a set of program statements also called program instructions. Each program instruction performs a specific task, 

The program instructions are machine instructions in a binary format that the CPU can directly execute. The operating system loads the machine instructions into the main memory (RAM) to initiate the program execution.

How a Program Instruction is Executed in a Computer System?

The CPU starts the program execution by fetching them one by one. The control unit decodes the machine instructions as per the instruction format.

The computer program uses different types of program instructions as per the program logic and algorithm.

Instruction Cycle

During the program compilation process, each program instruction is converted into machine instruction in binary. Depending upon the programming language, the program compiler converts the entire program into an executable code (set of machine instructions). In the case of an interpreted language, this conversion takes place line by line.

The executable code consists of a set of machine instructions in binary that can be directly decoded and executed by the CPU. A central processor of a computer is programmed to carry out the instructions provided to the CPU. It contains a special register — the instruction register — whose bit pattern determines what the central processor unit can do. Once that action has been completed, the bit pattern within the instruction register may be modified, and also the central processor unit can perform the operation nominally by this next bit pattern.

Since directions are simply bit patterns, they will be kept in memory. The instruction pointer register continuously has the memory address of (points to) the next instruction to be executed. so as for the management unit to execute this instruction, it’s derived into the instruction register. the case is as follows:

  1. A sequence of instructions is stored in memory.
  2. The memory address wherever the first instruction is found is copied to the instruction pointer.
  3. The CPU sends the address within the instruction pointer to memory on the address bus.
  4. The CPU sends a “read” signal to the control bus.
  5. Memory responds by sending a copy of the state of the bits at that memory location on the data bus, that the CPU then copies into its instruction register.
  6. The instruction pointer is automatically incremented to contain the address of the next instruction in memory.
  7. The CPU executes the instruction within the instruction register.
  8. Go to step 3
  9. Steps 3, 4, and 5 are called an instruction fetch. Notice that steps 3 – 8 constitute a cycle, the instruction execution cycle. 

It is shown graphically below.

Instruction Cycle

What is Instruction Format?

The computer program consists of a number of instructions that directs the CPU to perform specific operations. However, the CPU needs to know the details such as which operation is to be performed, on which data, and the location of the data. The information is provided by the instruction format.

The CPU starts the program execution by fetching the program instructions one by one from the main memory (RAM). The control unit of the CPU decodes the program instruction.

Instruction Cycle

The control unit of the CPU decodes the instruction based on the instruction format. It is the instruction format that provides the details of the operation to be performed (opcode), the effective address of the operand, and the data (operand) on which the operation is to be performed. 

The instruction format defines the layout and structure of the program instruction that can be decoded by the CPU and then perform the desired operation on the data.

  • Addressing Mode: The addressing mode specifies the rules for the CPU while operating on the OPERAND part of the machine instruction. The addressing mode allows specifying whether the OPERAND value is direct data or it is an indirect referencing.  The OPERAND bits can either represent a direct value, main memory address or CPU register number. It is the addressing mode that indicates the type of the OPERAND value. If the addressing mode is specified as indirect then the OPERAND contains a memory address that points to the actual data.
  • OPCODE: OPCODE specifies which operation is to be performed by the CPU while executing the instruction. The OPCODE directs the control unit of the CPU to operate on the data (OPERAND) as supported by the instruction set architecture (ISA) of the processor chip.
  • OPERAND: OPERAND simply means the data on which the CPU performs the desired operation. The OPERAND specifies either the data itself or a reference to the data as a memory address that contains the actual data. The CPU decodes the OPERAND as specified in the addressing mode. There can be different types of addressing modes used in the instruction format.

Instruction Cycle

Each computer’s CPU can have different cycles based on different instruction sets, but will be similar to the following cycle:

Fetch Stage: The next instruction is fetched from the memory address that is currently stored in the program counter and stored in the instruction register. At the end of the fetch operation, the PC points to the next instruction that will be read in the next cycle.

  • Fetch Cycle: Fetch the instruction from memory
  • Decode Cycle: Decode the instruction
  • Read Cycle: Read the effective address from the memory
  • Execute Cycle: Execute the instruction
Instruction Cycle

Registers Involved In Each Instruction Cycle

Following are the different types of registers involved in each instruction cycle:

  1. Memory address registers(MAR): It is connected to the address lines of the system bus. It specifies the address in memory for a read or write operation.
  2. Memory Buffer Register(MBR): It is connected to the data lines of the system bus. It contains the value to be stored in memory or the last value read from the memory.
  3. Program Counter(PC): Holds the address of the next instruction to be fetched.
  4. Instruction Register(IR): Holds the last instruction fetched.

Role of Registers Involved in Instruction Cycle

The program counter (PC) is a special register that holds the memory address of the next instruction to be executed. During the fetch stage, the address stored in the PC is copied into the memory address register (MAR) and then the PC is incremented in order to “point” to the memory address of the next instruction to be executed. 

The CPU then takes the instruction at the memory address described by the MAR and copies it into the memory data register (MDR). The MDR also acts as a two-way register that holds data fetched from memory or data waiting to be stored in memory (it is also known as the memory buffer register (MBR) because of this). Eventually, the instruction in the MDR is copied into the current instruction register (CIR) which acts as a temporary holding ground for the instruction that has just been fetched from memory.

During the decode stage, the control unit (CU) will decode the instruction in the CIR. The CU then sends signals to other components within the CPU, such as the arithmetic logic unit (ALU) and the floating-point unit (FPU). The ALU performs arithmetic operations such as addition and subtraction and also multiplication by repeated addition and division via repeated subtraction. It also performs logic operations such as AND, OR, NOT, and binary shifts as well. The FPU is reserved for performing floating-point operations.

Components of Instruction Cycle

Following are the main components of every instruction cycle:

1. Fetch Cycle

The fetching of instruction is the first phase. The fetch instruction is common for each instruction executed in a central processing unit. In this phase, the central processing unit sends the PC to MAR and then sends the READ command into a control bus.

After sending a read command on the data bus, the memory returns the instruction, which is stored at that particular address in the memory. Then, the CPU copies data from the data bus into MBR and then copies the data from MBR to registers.

After all this, the pointer is incremented to the next memory location so that the next instruction can be fetched from memory.

2. Decode Cycle

The decoding of instruction is the second phase. In this phase, the CPU determines which instruction is fetched from the instruction and what action needs to be performed on the instruction. The opcode for the instruction is also fetched from memory and decodes the related operation which needs to be performed for the related instruction.

3. Read Cycle

The reading of an effective address is the third phase. This phase deals with the decision of the operation. The operation can be of any type of memory type non-memory type operation. Memory instruction can be categorized into two categories: direct memory instruction and indirect memory instruction.

4. Execute Cycle

The execution of instruction is the last phase. In this stage, the instruction is finally executed. The instruction is executed, and the result of the instruction is stored in the register. After the execution of an instruction, the CPU prepares itself for the execution of the next instruction. For every instruction, the execution time is calculated, which is used to tell the processing speed of the processor.

Why Do We Need an Instruction Cycle?

Following are some of the important points that are necessary for a process like the instruction cycle:

  • There is a need for an instruction cycle for the computer system so that proper understanding can be done to understand the flow of instructions and execution of an instruction in a computer processor.
  • It deals with the complete flow of instruction when the computer system boots up until the computer system is shut down. By the instruction cycle, the internal flow of the central processing unit can be better understood so that if there is an issue, it can be easily resolved.
  • It deals with the basic operations of computer processors. There is a need for a proper understanding of the various stages involved in it.
  • The fetch-decode-execute cycle is common for all types of instructions for the computer processor system.

Importance of Instruction Cycle

Following are the points that highlight the importance of the instruction cycle:

  • It is important for the processor system for the central processing unit as the instructions are the basic operations that are performed in the main memory of the central processing unit.
  • It is a set of steps that help to understand the flow of instruction. By the instruction cycle, the end-to-end flow of instructions can be visualized in the computer processor.
  • It is common for all instruction sets needs to be properly understood so that all the operations can be performed easily.
  • By the instruction cycle, the processing time of the program can be easily calculated, which helps to determine the speed of the processor.
  • The processor’s speed tells how many instructions can be simultaneously executed in the central processing unit.

Types of Instruction Set

Generally, there are two types of instruction set used in computers.

  1. Reduced Instruction Set Computer (RISC)
  2. Complex Instruction Set Computer (CISC)

1. Reduced Instruction Set Computer

A number of computer designers recommended that computers use fewer instructions with simple constructs so that they can be executed much faster within the CPU without having to use memory as often. This type of computer is called a Reduced Instruction Set Computer.

The concept of RISC involves an attempt to reduce execution time by simplifying the instruction set of computers.

Characteristics of RISC

The characteristics of RISC are as follows:

  • Relatively few instructions.
  • Relatively few addressing modes.
  • Memory access is limited to load and store instructions.
  • All operations are done within the register of the CPU.
  • Single-cycle instruction execution.
  • Fixed length, easily decoded instruction format.
  • Hardwired rather than microprogrammed control.

A characteristic of RISC processors’ ability is to execute one instruction per clock cycle. This is done by overlapping the fetch, decode and execute phases of two or three instructions by using a procedure referred as pipelining.

2. Complex Instruction Set Computer

CISC is a computer where a single instruction can perform numerous low-level operations like a load from memory and a store from memory, etc. The CISC attempts to minimize the number of instructions per program but at the cost of an increase in the number of cycles per instruction.

The design of an instruction set for a computer must take into consideration not only machine language constructs but also the requirements imposed on the use of high-level programming languages.

The goal of CISC is to attempt to provide a single machine instruction for each statement that is written in a high-level language.

Characteristics of CISC

The characteristics of CISC are as follows:

  • A large number of instructions typically from 100 to 250 instructions.
  • Some instructions perform specialized tasks and are used infrequently.
  • A large variety of addressing modes- typically from 5 to 20 different modes.
  • Variable length instruction formats.
  • Instructions that manipulate operands in memory.

Example: For performing an ADD operation.

  • CISC will execute a single ADD command which will execute all the required load and store operations.
  • RISC will execute each operation for loading data from memory, adding values and storing data back to memory using different low-level instructions.


Instruction Cycle is a term used in computer architecture which basically means the time period between when a processor fetches an instruction from the memory and when it starts to execute that instruction.

The instruction cycle, suffice to say, is one of the most important components of the processor cycle and must be carefully calculated and implemented in the chip, which is why it is often used as a unit of measurement.

Image Credit: Desktop pc vector created by upklyak – www.freepik.com

{"email":"Email address invalid","url":"Website address invalid","required":"Required field missing"}